My client is currently seeking an experienced SoC Lead Engineer / Architect to take the lead in the architecture, microarchitecture, and design of next-generation edge AI and imaging SoCs. This is a senior, hands-on role with responsibility for driving the front-end design of complex, low-power, high-performance SoCs.
Working in a highly collaborative environment, you will partner with verification, validation, FPGA, and physical design teams to deliver innovative silicon solutions for next-generation AI-driven devices.
Key Responsibilities
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	Lead the architectural definition and microarchitectural design for advanced digital SoC modules. 
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	Own the front-end design flow from specification to RTL implementation. 
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	Define low-power architectures and SoC-level power management strategies. 
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	Deliver high-quality, synthesizable RTL (Verilog) and integrate internal and third-party IP. 
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	Collaborate with verification and FPGA teams on test planning and debug. 
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	Partner with physical design to meet aggressive performance, area, and power targets. 
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	Apply advanced design methodologies (synthesis, lint, CDC, formal verification, UPF, DFT/MBIST). 
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	Leverage scripting skills (Python, Perl, TCL) to streamline and automate workflows. 
Qualifications & Experience
Required
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	Degree in Electronics / Electrical Engineering or related field. 
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	12+ years’ proven experience in SoC architecture, design, and debugging. 
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	Track record of delivering SoCs from concept through to tape-out. 
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	Strong expertise in SoC methodologies and IP integration. 
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	Ability to lead technical programs across multiple sites. 
Preferred
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	Experience with advanced nodes (TSMC 12nm and below, Samsung 8nm and below). 
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	Familiar with Synopsys/Cadence IP and SRAM memory integration. 
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	Delivered SoCs incorporating DFT/MBIST architectures. 
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	Knowledge of packaging techniques (WLCSP, FCCSP, 2D/2.5D) and commercialization. 
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	Exposure to fast-paced startup or scale-up environments. 
Why Apply
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	Opportunity to lead high-impact SoC programs at the forefront of AI and imaging. 
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	Collaborate with global experts in NPUs and silicon system design. 
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	Join a flexible, innovation-driven environment where technical leadership is highly valued.